ISA Description Language
ISA semantics you can compile.
IDL is embedded in the RISC-V Unified Database to describe what every instruction and CSR does. It compiles into a compliant ISS and drives documentation, decoder, and formal model generation.
What carries over from C-family languages and what you need to unlearn.
What carries over from Verilog/SV and what is different.
Patterns and conventions for writing new instructions and CSR definitions.
The most common mistakes when reading or writing IDL.
Dense syntax cheat sheet — types, operators, builtins, and declaration forms on one page.
Design goals, use cases, worked example, and language basics.
Bits<N>, Boolean, enumerations, bitfields, structs, arrays, tuples.
Assignment, naming rules, compile-time vs. runtime.
Verilog-style, C-style, array, and string literals.
Precedence table, widening operators, and arithmetic rules.
Implicit widening, $signed, $bits, $enum casts.
if/else and for loops, including const loop variables.
Declarations, return values, rules, and builtin functions.
Global, function, instruction, and CSR scopes.
$pc, $encoding, $array_size, $enum_size, and more.
CSR access, extension checks, exceptions, memory operations.
How operation() bodies describe instruction semantics.
sw_read(), sw_write(), field types and reset values.